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RISC-V
The Open-Standard Instruction Set Architecture
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- Zurich, CH
- https://riscv.org
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Repositories
Showing 10 of 79 repositories
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- riscv-isa-explorer Public
A simple and intuitive approach to visualize RISC-V Extensions and Profiles.
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- riscv-cheri Public
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
- riscv-zilx Public Forked from riscv/riscv-isa-manual
RISC-V Integer Indexed Load (Zilx) fast-track extension. Jira RVS-4890.
- riscv-memory-tagging Public
Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores
- integrated-matrix-extension Public Forked from riscv/riscv-isa-manual
RISC-V Integrated Matrix Development Repository
- riscv-performance-event-sampling Public
Define 2 new extensions to, along with Zihpm and Sscofpmf, enable event and instruction sampling with precise attribution.
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